An integrated circuit (IC) is a semiconductor wafer on which thousands or millions of tiny resistors, capacitors, and transistors are fabricated. An integrated circuit is also known as a “microchip” or a “chip.” Integrated circuit technology enables different electronic modules to be combined into a single integrated circuit. The term “module” refers to a unit within a larger device that is designed to be separately installed, replaced, or serviced. A great deal of effort has been invested in the development of chips in which an entire electronic system is integrated with both hardware and software on a single chip.
Such an implementation is known as a “System-On-a-Chip” or an “SOC”. In a System-on-a-Chip implementation Intellectual Property (IP) elements and/or Virtual Components (VC) are mixed and matched on a single integrated circuit chip. An IP element may be any custom hardware development. IP elements are usually reused for different operations and tasks. Virtual Components (VC) are software implementations that handle the IP elements and manage operations of the chip.
System-On-a-Chip designs are based on the reuse of IP elements. An illustrative example of an SOC design is an information appliance called Geode™ SC1400. Geode™ SC1400 is a trademark of National Semiconductor Corporation. Geode™ SC1440 comprises a single integrated circuit chip in which several data acquisition and processing units are embedded. Additional information on Geode™ SC1400 may be obtained at the following website address: “http://www.national.com/appinfo/solutions/0,2062,243,00.html.”
The Geode™ SC1400 comprises an x86-compatible processor, an MPEG2 decoder, a cathode ray tube (CRT) interface, a television (TV) video processor, a bridge, and super input/output (I/O) block, all of which require a plurality of conventionally designed chip devices. Each of the components of the Geode™ SC1400 is implemented from one or more independent modules, where each module has data input/output (I/O) and a connection to a power supply. It is not necessary to understand the design or operation of the Geode™ SC1400 in order to be able to understand the principles of the present invention. The Geode™ SC1400 is described in this patent document only as an illustrative example of a System-On-a-Chip.
In System-On-a-Chip implementations like the Geode™ SC1400 described above, different modules on the chip may be analog and/or digital, according to their designed function. For example, the bridge and the processors are digital modules, while the super input/output (I/O) module is an analog module. The super input/output (I/O) module comprises analog elements because it processes analog signals.
In a System-On-a-Chip implementation different modules use different voltage levels. For example, the Geode™ SC1400 utilizes six (6) different power supply voltages. The need for so many power supply voltages is due to the different voltage levels required by the modules, and the requirements for noise immunity and for low power mode operations.
The design of a System-On-a-Chip raises new types of problems, such as interactions between the different modules, power management, and noise disturbances arising from the close proximity of analog modules and digital modules on a single integrated circuit chip. These types of problems were formerly addressed at the system level. That is, these types of problems were addressed in the circuit board design stage. However, in System-On-a-Chip systems, these types of problems have to be addressed during the design stage of the System-On-a-Chip.
One such problem is the presence of multiple power supply voltages. In an IP design only one power supply voltage (VDD) is usually involved. In a mixed signal design (i.e., analog and digital) two power supply voltages (VANALOG and VDIGITAL) are usually involved. However, the design of a System-On-a-Chip can involve a plurality of power supply voltages. For example, the Geode™ SC1400 has six power supply voltages. They are VDIGITAL, VSB, VBAT, VCORE, VIO and VANALOG.
Another problem relates to the use of a low power mode to reduce power consumption. For most of the digital modules and analog modules on a System-On-a-Chip, there are times when an individual digital module or an individual analog module is not actively operating. In particular, there are periods of time during which the modules do not contain valid data. The data that was generated or processed by the modules has been passed on to a subsequent stage and will not be required again from the modules. During such periods of time, a module may enter a low power mode in order to reduce power consumption. While a module is in a low power mode, activity of the module is either partially halted or entirely halted. The module enters a full power mode only when full operation of the module is required.
A low power mode is typically achieved in a module by cutting off the module's power supply, and (if required) by maintaining some logic activated by a low frequency clock to monitor the ongoing activities of the module. The power cutoff for a module is easily accomplished in an IP design where only one power supply voltage is involved. The power cutoff for a module is also easily accomplished in a mixed signal design where only two power supply voltages are involved.
In a System-On-a-Chip design, however, a plurality of power supply voltages are involved. Because usually more than two power supply voltages are involved, the designer of a System-On-a-Chip must confront a diversity of miscellaneous problems that are caused by the presence of several power supply voltages. One of the main problems involves preventing and eliminating incorrect transactions between active modules and inactive modules.
Some of the other problems that must be addressed are due to noise interference and clock synchronization that occur when inactive modules are activated from their low power mode.
There is therefore a need in the art for an apparatus and method that will provide multiple power supply voltages to an integrated circuit. There is also a need in the art for an apparatus and method that will prevent and eliminate incorrect transactions between active modules and inactive modules. There is also a need in the art for an apparatus and method that will properly synchronize clock signals when a module is changed from an active full power mode to an inactive low power mode. There is also a need in the art for an apparatus and method that will properly synchronize clock signals when a module is changed from an inactive low power mode to an active full power mode.